Thursday, January 15, 2004

Tanner Launches Layout, Verification Software

Pasadena-based Tanner EDA (www.tanner.com) has launched a new line of layout and verification software for integrated circuit designers. The company's HiPer Verify product offers background design rule checking, enabling designers to improve their designs and efficiency while their designs are being checked for accuracy. Tanner develops layout, verification, and simulation software for analog, mixed-signal, MEMs, and optical circuit design.

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